Half Adder: Definition and Explanation

A half adder is a basic digital circuit used for adding two single-bit binary numbers. It produces two outputs: a sum and a carry. It is called a "half" adder because it only adds two bits, unlike a full adder, which adds three bits (including a carry-in bit from a previous addition).

Truth Table

The two inputs to a half adder are typically labeled as A and B, and the two outputs are Sum (S) and Carry (C).

A	B	Sum (S)	Carry (C)
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

Functioning of a Half Adder

1. Sum (S): The sum output is the result of adding the two bits without considering any carry from a previous addition. This can be calculated using the XOR (exclusive OR) operation:

   $$\text{Sum} = A \oplus B$$

   The XOR operation returns:

   • 1 if exactly one of the inputs is 1 (i.e., if the inputs differ),
   • 0 if both inputs are the same.

2. Carry (C): The carry output is generated when both input bits are 1, and it is calculated using the AND operation:

   $$\text{Carry} = A \cdot B$$

   The AND operation returns:

   • 1 if both inputs are 1,
   • 0 otherwise.

Logic Gate Implementation

A half adder can be implemented using the following logic gates:

• XOR gate for the Sum (S).
• AND gate for the Carry (C).